Field emitters hold the promise for realization of related large-scale imaging systems. Ranging in size from thirty to forty inches, such systems would replace existing LCDs and plasma displays and could be used for big screen TVs and billboard signs. The advantages of a field emitter display (FED) are lower power requirements, wider viewing angles and higher quality images. Developing methods for manufacturing such displays has proven difficult, but advances in field emitters have made the production of large-scale FED arrays an important subject of study.
LCDs must reconcile the quality of the image produced with the power required to create the image. Because they do not produce their own light but are backlit, LCDs have high power requirements, but lowering the power for the backlights affects the brightness and contrast of the resulting image. Increasing the size of the image compounds this problem. LCDs also have a limited viewing angle. If the screen is viewed from too great an angle then it appears to go black. (photographic negative) Plasma display panels (PDPs) avoid some of the problems associated with LCDs, but high voltage requirements necessitate the use of expensive driver circuits, and CRT technology still produce a sharper, clear image.
Field emitters are based on existing cathode-ray tube (CRT) technology. Based on thermionic emission, CRTs use heat energy to overcome the work function of electrons so that they are freed from the cathode material and can be accelerated by a positive voltage. The directed electron beam then strikes a phosphorous screen, transferring energy to the phosphorous. The phosphorous then releases the energy in the form of photons which pass through a glass screen creating the image on the display. In field emitters, the CRT high voltage electron gun is replaced by cold electron source arrays.
Most cold electron source arrays consist of conical-shaped conductors or semiconductors that are surrounded by small gates with typical diameters ranging from 0.5 to 1.5 micrometers. Metallic cone emitters are disclosed, for example by C. Spindt in U.S. Pat. No. 3,665,261, and semi-conductive cone emitters are described, for example by H. Busta in U.S. Pat. No. 5,277,699, entitled "Recessed Gate Field Emission," issued Jul. 13, 1993. See Generally:
(1) Presentations by Silicon Video Corporation, Micron Display Corporation and FED Corporation at the ARPA High Definition Systems Information Conference, Arlington, Va., Apr. 30-May 3, 1995. PA1 (2) J. Levine, "Field Emission Displays," American Vacuum Society Test Panel Display Processing and Research Tutorial, June 21, San Jose, Calif. 1995. PA1 (3) J. P. Spallas et. al., "Field Emitter Array Patterning for Large Scale Flat Panel Displays Using Laser Interference Lithography," Technical Digest Eighth Intern. Vacuum Microelectronics Conf., Portland, Oreg., p. 103, 1995. PA1 (4) J. E. Pogemiller, H. H. Busta, and B. J. Zimmerman, "Gated Chromium Volcano Emitters," J. Vac. Sci. Technology B 12 (2), p. 680, 1993.
To form these cone arrays, typical photolithographic processing tools, as they are used in the manufacture of integrated circuits on eight inch diameter wafers, are employed. Such processing tools include UV light optical steppers and electron beam exposure systems. For arrays that can be fabricated on eight inch diameter substrates, these tools are perfectly adequate. However, for FEDs having principal dimensions of 12 to 20 inches and larger, adequate photolithographic tools do not yet exist for exposing these small(micron and submicron) gate diameters. See in this regard:
Fortunately, different field emitter structures exist in which the small spacing between the extraction gate and the emitter is obtained by a thin film deposition step and not by lithography. These devices are typically referred to as volcano shaped field emitters or as vertical (thin film ) edge emitters. A production technique has been proposed wherein these devices are employed to fabricate arrays using printed wiring board-type lithography. See the following publication:
Field emitters have been designed which exhibit lower capacitance levels adequate to achieve practical turn-on voltages. These devices have also configured electrode spacing dielectric components to avoid pinhole phenomena thus assuring more stable performance of the device. Such devices are described in co-pending application for U.S. patent Ser. No (Attorney Docket JAC 2-001-3) filed and assigned in common herewith.
To create an array of field emitters, the techniques of spin-on glass and resist etchback are used to remove metal or dielectric layers. While these techniques are widely used in the industry for small displays, they are inadequate for formation of displays which have larger diagonal dimensions, for instance, about twenty inches or greater. Both spin-on glass and resist etchback require the build-up of photoresist on the surface to be removed and such build-up becomes difficult to achieve when forming large displays. In this regard, practical fabrication capabilities essentially preclude photoresist application by spinning, meniscus coating approaches being resorted to. These latter coating procedures, while less expensive to carry out, do not deliver the desired photoresist profiles.